Controlling Growth of Large Area Graphene on SiC
Tuesday, September 18, 2012 – 3:15pm – 4:15pm
Naval Research Laboratory
The SiC sublimation approach is one of only two methods for forming uniform layers of graphene on large area substrates amenable to Si processing technology. After a brief historical perspective, we describe and give examples of the current state-of-the-art in SiC wafer technology focusing on properties critical to large area graphene films. The sublimation conditions with regard to the polarity of the SiC surface are generally described and specific examples of the well-known surface morphological and electrical properties of epitaxial graphene (EG) will be given. For the case of EG formation on the C-face, island nucleation at threading screw dislocation sites dominates under typical processing conditions and this gives rise to a stochastic growth process which is consistent with experimental data from many laboratories. For the case of the Si-face, EG formation depends upon surface preparation and is also a function of surface misorientation; a step retraction and carbon diffusion process dominates graphene formation. Control of step formation on the Si-face is thus significant for achieving uniform EG thickness on terraces as well as to minimize additional growth at the step edge and this will be demonstrated using atomic force microscopy and scanning electron microscopy images in combination with Raman spectroscopy maps and x-ray photoelectron spectroscopy analysis. The impact of processing factors such as temperature control, laminar gas flow and substrate rotation on large area EG uniformity are described using examples grown in a commercial SiC epitaxy reactor. Contactless Lehighton resistivity maps of 75 mm wafers will be used to illustrate the current state-of-the-art, which is about ±3%. Lastly, a brief future perspective on the mitigation of step bunching (known to cause resistance inhomogeneity in EG), and a seamless EG growth-hydrogen intercalation process will be given.